1 September

Because of the lack of a universal standard for board-level reliability testing, it’s crucial to have a robust plan in place to avoid confusion, delays and dissatisfaction up and down the supply chain.

Semiconductor manufacturers have been pivoting their focus to automotive electronics to find the next large-volume growth opportunity. This adjustment is for good reason as automotive electronics is one of the fastest-growing markets for integrated circuits. To be successful in the competitive automotive electronics landscape, semiconductor manufacturers must account for differences in how automotive OEMs and their suppliers qualify ICs compared to consumer products. A key factor is the critical importance of board-level reliability testing (BLRT).

BLRT is the process of evaluating the robustness of a semiconductor package once the device is soldered to the printed circuit board. While relatively common now, it used to be a deviation from common semiconductor qualification practices. There’s a lack of a universal standard for BLRT. Therefore, it’s crucial to have a robust plan in place to avoid confusion, delays and dissatisfaction up and down the supply chain.

Ansys Sherlock thermal mapping
Thermal map of a PCB in Ansys Sherlock. The most at-risk components are shown in red.

Third approach

The first step in developing a BLRT plan consists of identifying the tests. The most critical is temperature cycling as it’s one of the most common environments across potential customers and it’s the stress most likely to cause failure of solder joints. Other potential BLRT tests – power cycling, temperature/humidity, mechanical shock, vibration and bend testing – depend on finding the appropriate balance between the relatively few industry standards, customer requirements (which is difficult if you have thousands of customers) and the ability to pass the test that should be evaluated before BLRT.

As BLRT can be expensive and time consuming, it’s important to have performed a robust risk assessment before physical testing to ensure high confidence in BLRT success. This can be challenging for most semiconductor manufacturers because of the methods currently used to perform risk assessments – the overly complex three-dimensional (3D) finite element analysis (FEA) or overly simplistic reliability by similarity. While the first method takes significant time and requires highly specialized experts, the second carries risk as it relies on human judgment and questionable assumptions that could prove costly if the device fails BLRT.

Given the limitations of both techniques, several semiconductor manufacturers have transitioned to a third approach. This technique leverages physics-based, closed-form reliability equations, such as the Blattau model. This either enables design teams to perform a BLRT risk assessment on their own or allows analyst teams to rapidly extrapolate existing 3D FEA results to a wider range of devices.

Thorough plan

One of the most unappreciated aspects of a successful BLRT is the test coupon design. The coupon thickness, coupon materials, coupon stackup, bond pad design and how the coupon is constrained can all play a critical role while also being relevant to the most important customers. Once all the test parameters have been selected and success has been confirmed, it’s time to perform BLRT. However, testing isn’t as turnkey as one would expect. The key to implementing an efficient BLRT plan is operational intelligence that factors in the expectations of OEMs, suppliers and manufacturers across the industry to fully understand their needs.

For semiconductor manufacturers entering the automotive environment, the lack of universal qualifications standards often leads to inconsistent reliability expectations. The most efficient solution is to establish a robust and thorough BLRT testing plan uniquely designed for a specific manufacturer and validated by a broad range of industry experiences.

This article was written by Ansys.