Paul van Gerven
11 March 2020

Researchers from the Chinese Academy of Sciences have succeeded in shrinking the fin in a FinFET to a single atomic layer. Obviously, it cannot get much thinner than that.

Credit: IMR

First proposed in the 1990s, chipmakers started adopting the FinFET architecture about a decade ago to combat short-channel effects and other drawbacks resulting from shrinking CMOS for years and years. Currently, fins are a few nanometers wide and it’s almost impossible to make them any thinner using current process technology. This hinders shrinking transistors any further.

The Chinese researchers and partners from France developed a process to grow 2D materials such as molybdenum sulfide that stand upright on a wafer. Wrap them with a dielectric and a gate electrode, add a source and gain and you’ve got yourself a FinFET with a 0.6 nanometer wide channel.

Though early days, the researchers believe their findings “may shed light on the next-generation nanoelectronics for higher integration and lower power consumption.”