Paul van Gerven
19 January 2017

Extreme ultraviolet lithography (EUVL or simply EUV) is the world’s most advanced technique to ‘draw’ the various structures that make up a chip, allowing the semiconductor industry to continue making more powerful chips for another decade at least. How does it work? And why did it take so long to develop?

Where does EUV fit in with the chip manufacturing process?

Chip fabrication is a complex, iterative process in which a chip is built up layer by layer using a variety of techniques. But in very broad strokes, for each layer, a pattern is ‘burned’ into a light-sensitive material, called the resist, and then developed. The burning part is called photolithography, and EUV is the latest photolithographic technique to be put into operation by chip manufacturers, although it’s currently only used for the most complex chip layers. For less challenging patterns, older (and less costly) lithographic techniques still suffice. As chip technology advances, more and more layers will be handled by EUV.

How does semiconductor manufacturing lithography work in general?

Lithography is more or less like projecting an old-school slide in reverse. A slide projector sends light through a shrunken image and a lens so that the enlarged version of it shows up on the screen on the other side of the room. In lithography, light is sent through an image of a chip layer – contained in the photomask or reticle – and then through a series of lenses to shrink it down, eventually landing on a resist-covered substrate.

This substrate is a pizza-sized disk made of silicon, called a wafer). One wafer eventually turns into many chips, how many exactly depends on the size of the chip. This means the same chip layer image needs to be projected many times onto the same wafer, at different spots, until the disk is filled and the development process can start. Once developed, the next layers will be ‘printed.’

Lithography for semiconductor manufacturing in a nutshell: lenses shrink a mask pattern and project it onto the wafer.

How does the development process work?

Because of the photomask, some parts of the resist have been hit by light, which hardens it up. In development, the unexposed parts are washed away chemically in a procedure called etching. While doing so, the material that was present underneath the resist is also removed. Thus, upon removal of the remainder of the resist, the photomask pattern has been carved out in the wafer (or in the material that had been deposited on the wafer before applying the resist).

Even though exposure of the resist and etching are both integral parts of the lithography process, in practice, they’re separate steps, carried out using different pieces of equipment. Exposure is performed in what’s called a scanner, etching with specialized etching equipment. The wafer shuttles between these machines and usually also undergoes additional treatments in yet other pieces of equipment, which we won’t discuss here.

What’s the importance of lithography in semiconductor manufacturing?

It plays a crucial role because it determines the size of the individual components in a chip. This, in turn, has a large effect on the cost and performance of the chips.

The smaller the components – transistors, mostly – the smaller the chip itself, and the more chips fit on a wafer. Meanwhile, the cost of processing a wafer remains roughly the same regardless of the number of chips on it. This means scaling down component size results in cheaper chips. Alternatively, you can keep the chip the same size, so that it will have more components on board. This makes it more powerful but not (much) more expensive. On top of that, up to a point, scaling down transistors improves their performance without increasing their power consumption.

Gordon Moore, co-founder of Intel but at the time working at Fairchild Semiconductor, published this graph in 1965. It predicts a doubling of transistor density every year. In 1975, this was revised to a doubling every two years.

So, clearly, there’s a huge incentive for chip manufacturers to shrink their transistors. And that’s exactly what they’ve been doing over the past decades. Historically, as stated by the famous Moore’s law, the number of transistors in a chip has roughly doubled every two years. Over that period, lithographic patterns have shrunk from tens of micrometers to tens of nanometers. At the same time, the number of transistors in a chip has increased from hundreds to billions or even trillions.

Since the late 2000s, things have gotten a little bit more complicated as far as Moore’s law goes, but the incentive to keep shrinking is still there. Because, after all, there’s always demand for more powerful and faster chips, either to help existing technology get better or to enable a new technology to take off.

How did chip manufacturers manage to keep shrinking chip patterns all those years?

Mostly, by transitioning to light sources with successively shorter wavelengths every once in a while. The shorter the wavelength, the smaller the features that can be projected. From the 1960s to the 1980s, the semiconductor industry ran down the spectral lines of mercury (from 436 to 365 nanometers). Next came excimer lasers: first krypton fluoride (KrF) (248 nm, in 1990) and then argon fluoride (ArF) lasers (193 nm, in 2002). The latter two wavelengths are in what’s called the deep UV (DUV) region of the electromagnetic spectrum.

There was never any doubt that ArF lasers would eventually run out of steam as well. Using every trick in the book, ArF scanners can produce features of about 38 nanometers. Chipmakers, however, always want to go smaller. There are lasers with wavelengths shorter than 193 nm, such as 157, 146 and 125 nm, but for a variety of reasons, these aren’t good options for chip manufacturing.

After evaluating a number of non-optical alternatives, the semiconductor industry eventually decided that a revolutionary jump in wavelength, to EUV radiation, would be the best bet. This presented a great challenge because even though the principles that underlie an EUV scanner are the same as for its optical predecessors, the execution is completely different.

EUV to the rescue

What’s EUV radiation?

In the electromagnetic spectrum, extreme ultraviolet is the most energetic part of the UV region. It runs from 100 to 10 nanometers, between x-ray radiation (< 10 nm) and deep or far-ultraviolet (100 to 200 nm). For comparison: visible light runs from 700 to 400 nm, and colloquially, UV radiation refers to 400 to 280 nm – the portion of UV radiation emitted by the sun that reaches the earth’s surface.

EUV radiation is the most energetic type of ultraviolet radiation.

There are no natural sources of EUV radiation on Earth. The sun’s corona produces EUV radiation, but none of it reaches the earth’s surface because the atmosphere and the ozone layer absorb it all. In fact, no type of radiation is absorbed by air more strongly than EUV. On Earth, EUV is produced exclusively by artificial sources.

For semiconductor manufacturing, EUV light of 13.5 nm wavelength is used.

Why does EUV differ so much from previous generations of semiconductor lithography technology?

For two main reasons. First, EUV radiation is hard to generate in a controlled manner. Only excited electrons in the inner shell of a multiply ionized atom can emit EUV. You will find these electrons only in hot, dense plasmas (such as the outermost regions of the sun), and making these is a rather violent endeavor. Alternatively, EUV radiation is emitted by free electrons racing through a synchrotron – a huge and enormously expensive piece of equipment.

Secondly, EUV radiation is readily absorbed by air and other gasses. This means that the light has to travel through a high-quality vacuum from the moment it’s generated to the moment it hits the wafer. It also means that it’s impossible to construct ‘EUV lenses.’ Instead, highly complex curved reflective mirrors need to be employed. A traditional photomask, too, would absorb too much light, so it needs to be reflective as well.

How is EUV light produced for lithography purposes?

The best way to generate EUV light has been the subject of research for a long time, but tin came out on top as the base material of choice. Tiny droplets of the metal – tens of thousands per second – are ejected from a nozzle and, while falling down, shot twice with a laser. The first, relatively weak shot deforms the droplet into a pancake shape. The second laser shot carries much more energy and instantly turns it into an EUV-emitting plasma. Special optics (see below) collect and prefilter the broadband radiation and direct it into the EUV scanner, where it’s filtered again to obtain ‘clean’ 13.5 nm EUV light.

Artist impression of an EUV source.

How do EUV optics work?

There’s no material that can reflect a substantial portion of the EUV light in a single layer. But because multiple layers can reinforce each other’s reflections, it’s possible to make reasonably efficient EUV mirrors that shrink and focus the image. These mirrors are crafted by alternating nanolayers of molybdenum (which partially reflects EUV light) and silicon (which is largely transparent to EUV). The theoretical maximum reflection is 74 percent. So, no matter what you do, over a quarter of the radiation is lost at each mirror.

In a multilayer EUV mirror, reflections from molybdenum nanolayers add up.

EUV mirrors are extremely complex to make. Their surfaces need to be almost perfectly smooth and clean and every nanolayer needs to have a precisely defined thickness. In essence, every single atom needs to be in the right place, or the light may be lost or the image may be deformed.

EUV photomasks, too, are multilayered EUV mirrors, but with an absorbent layer on top of them, in which in the chip layer structure is etched.

From lab to fab

When did the development of EUV start?

Research into EUV lithography started in the 1980s. In 1989, Japanese researcher Hiroo Konoshita, with the help of American colleagues, was the first to produce a pattern of microstructures using EUV. Unaware of Konoshita’s work, Dutch scientist Fred Bijkerk also succeeded in projecting EUV images a year later.

Efforts into the industrialization of the technology started in 1994, when several US research labs teamed up in the US National EUV Lithography Program. In 1997, the labs were joined by a number of semiconductor companies and equipment manufacturers, forming the EUV Limited Liability Company. In 2001, the EUV LLC delivered the very first prototype EUV scanner that could print finer lines than any lithographic technique was capable of at the time. This so-called Engineering Test Stand convinced many that EUV lithography was the industry’s best bet to keep on shrinking chip patterns in the future.

It was a far cry from a production-worthy EUV scanner, but the Engineering Test Stand made an impression on the semiconductor lithography community at the time.

At this point, scanner manufacturers decided to throw their weight behind EUV. At the time, three companies shared the semiconductor lithography market: ASML from the Netherlands and Canon and Nikon from Japan. All three started developing EUV scanners, but as ASML conquered more and more market share over the years, both Canon and Nikon eventually bowed out. ASML, together with its network of technology suppliers, therefore, had to shoulder the development of what’s arguably the most crucial element of EUV lithography all by itself. Eventually, those efforts paid off handsomely, though: ASML is now the sole supplier of EUV scanners. The semiconductor industry has recently credited the company for its leading role in the development of the technology.

When was EUV first applied in chip manufacturing?

Using ASML’s EUV scanners, chip manufacturers Samsung and TSMC started limited production of ‘EUV chips’ in 2018, followed by volume production in 2019. The first commercial devices powered by a chip manufactured using EUV, the Samsung Galaxy Note10 and Galaxy Note10+, were launched on 23 August 2019. TSMC, which supplies chips to Apple among others, announced the first shipments of EUV-made chips in large numbers in October 2019.

An ASML EUV scanner in action. The source is at the bottom right, beaming the light ‘north north west’ into the scanner. After bouncing off several mirrors, the light hits the reflective mask at the top before making its way to the wafer via another set of mirrors. Credit: ASML

There’s no denying that EUV was very late to the party, however. Originally, it was thought that the successor of ArF lithography would need to be ready in 2005 or 2006. That was later pushed back to 2010 because of an extension of ArF lithography, called immersion lithography. But from 2010 on, chip manufacturers had no choice but to create their most complex chip layers in two or more exposures per layer. Multipatterning was a painful interim solution, as it increases the total number of exposures per chip, and hence the cost.

Why did it take almost two decades to take EUV lithography from the prototype stage to a production-ready technology?

The Engineering Test Stand proved that the basic physics of EUV lithography are sound. But there’s a big difference between demonstrating a proof of principle and building machines that are commercially viable. Put simply, it’s one thing to build a machine that can do something, but it’s another thing entirely to build a machine that can do that all day, every day. In short, the engineering of EUV scanners proved extremely challenging.

An EUV scanner needs to be able to process a certain number of wafers per day (or any other time span) for it to be cost effective, no matter how well it can shrink patterns. That means wafers must move through the machine at a certain rate and the machine must be up and working most of the time. Both the throughput (maximum number of processed wafers per day, assuming continuous operation) and the availability (percentage of a time span that the machine is operational) proved very challenging issues.

Why was it so difficult to get the throughput and availability up to a commercially viable level?

The issue, essentially, was getting enough light to the wafer. The throughput of an EUV scanner is directly linked to the sensitivity of the resist: the less light is required to harden it up, the quicker the exposure takes place and the more wafers can be processed per hour. As it turned out, the light intensity needed for an acceptable throughput required the EUV source to be an incredible piece of engineering. It needed to produce hundreds of watts of EUV light (remember: because of the EUV optics, a lot of EUV light is absorbed on the way to the wafer). And it needed not to break down or be serviced all the time.

And so the EUV source turned into EUV’s main bottleneck. Ejecting fifty thousand tin droplets per second like clockwork is hard. Hitting all of them twice with lasers in such a way that the incoming energy is converted into as much EUV light as possible is hard – the physics of that process wasn’t fully understood at the time, and it still isn’t. Mitigating the violence of the process, causing shock waves that disrupt the trajectory of the tin droplets, is hard. Doing all that in the vicinity of a very delicate and expensive piece of EUV optics (the collector) that needs to stay clean at all cost – a tiny bit of tin gone astray could ruin it – is very hard. And all this is merely a selection of the issues ASML’s engineers had to resolve.

The road to success was arduous indeed. ASML shipped two so-called Alpha Demo Tools to semiconductor research institutes Imec in Leuven and the College of Nanoscale Science and Engineering of the University at Albany in 2006. These were primitive machines, intended for researchers to get the hang of EUV lithography. It took another ten years, the acquisition of EUV source developer Cymer and a hefty financial injection from key customers before ASML finally turned the corner and started receiving orders for production-capable EUV scanners. A good number of industry insiders had doubted EUV would ever make it to the chip factory, and at that point, the Veldhoven-based company wasn’t too proud to admit that it had underestimated the whole ordeal.

What’s next?

ASML will keep improving throughput and other specifications to make EUV more cost effective for its customers, who will increasingly rely on the technique to manufacture their chips as semiconductor technology keeps advancing. Eventually, however, EUV technology will run out of steam too. At some stage, EUV multipatterning might be considered. However, ASML is already developing a new generation of EUV tools: so-called high-NA scanners. These work with the same 13.5 nm EUV light but exploit another optical parameter to increase resolution: the numerical aperture (NA). The start of commercial production is slated for 2024.