Interview

Training is key to superior chip knowledge at NXP

Collin Arocho
Leestijd: 5 minuten

As the electronics and semiconductor domain continues to explode with complexity, engineers are having to step outside of their comfort zones and take on new roles to keep up with the increasing demands of chip performance. For semiconductor giant NXP’s failure analysis department, training employees and broadening its knowledge base is instrumental in holding the leading edge.

For nearly 25 years, Johan Knol has known exactly where he wanted to be. In 1996, fresh off finishing his master’s degree in electronics with a focus on analog design and semiconductor processing at the University of Twente, he had his eyes set on joining the semiconductor arm of Philips – which was later spun out as NXP. “I saw what Philips was achieving in the semiconductor industry at that time and it was quite impressive. But even then, it was extremely evident to me that the industry needed a major catchup, particularly in the analog-chip world,” recalls Knol, Manager of Failure Analysis for Security and Connectivity at NXP. “I came to Nijmegen to tour their cutting-edge MOS-4 fab, and it really piqued my interest. I knew this was a place where real innovation could be realized, and I wanted to be part of it.”

In his 25 years with the company, Knol has held several positions. First as a device physics engineer, then a process integration engineer – working to improve the overall process from development to manufacturing – before opting for a move to NXP’s failure analysis (FA) department. “I chose failure analysis because it combines all corners of NXP. Essentially, we work in a state-of-the-art silicon debug lab, where my group is responsible for identifying electrical failures within all the new products NXP launches and ensuring all of our products meet the highest quality standards,” describes Knol. “We help the design teams identify issues in the design and manufacturing chains. To do that, NXP provides us with top-of-the-line equipment to handle all the analysis requests, from mixed-signal processing technologies down to 16nm, and using techniques like laser voltage probing, laser frequency mapping and nanoprobing – we do it all.”

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