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Placing and matching a multilayer chip antenna

Muhammad Ali Khalid, Richard Blakey
Leestijd: 5 minuten

How do you get the maximum performance from a multilayer chip antenna with respect to antenna placement on a PCB and effective impedance matching? Würth Elektronik’s Muhammad Ali Khalid and Richard Blakey explain.

The trend to miniaturize wireless communication devices has led to decreased PCB sizes and increased component densities. Although this shift has aided many areas of electronic design, it constrains RF front-end design. Due to the nature of antennas sending and receiving electromagnetic signals, they interact and are affected by the entire surrounding environment and are extremely sensitive to electromagnetic fields. This can be extremely problematic for RF engineers when integrating into a design an antenna that’s small, has good gain and efficiency in the frequency range of operation and is able to work as desired in different PCB environments.

Multilayer chip antennas are an interesting choice for engineers who are restricted by cost and space requirements in wireless system design. Such antennas are formed from several layers of dielectric material, which are pressed and fired together into a monolithic structure. Each dielectric layer has patterned metallization on the surface that connects to other layers through vias. The inner conductors and vias form a radiating, multilayer meander structure, allowing the component to be smaller than a monopole antenna while achieving comparable performance. Electromagnetic fields are generated by the currents on the inner conductor.

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