Monolithic design is about to get some stiff competition

Paul van Gerven
Leestijd: 4 minuten

Right now, chiplets are mostly found in high-margin processors, but that’s likely to change. The recently introduced ‘universal’ chiplet interconnect standard UCIE could fast-track the technology.

It seems that monolithic IC design of processors has had its day in the sun. AMD’s next generation of exascale-class GPU accelerators, the MI200 family, combines two full-fledged GPU dies. The flagship of the series, the MI250X, will be used alongside Epyc CPUs to power the world’s first exascale supercomputer at the Oak Ridge National Laboratory in the US.

Not to be outdone, Intel is dotting the i’s on the Ponte Vecchio processor, which combines compute, cache, networking and memory chiplets – tiles in Intel’s nomenclature – for a whopping total of 47 active and 16 thermal tiles inside a single package. Ponte Vecchio will co-power the 2+ exaflop Aurora supercomputer, to be deployed at the end of the year at the US Argonne National Laboratory.

This article is exclusively available to premium members of Bits&Chips. Already a premium member? Please log in. Not yet a premium member? Become one and enjoy all the benefits.


Related content