Reading time: 8 minutes
After decades of innovation in lithography, high-NA EUV might prove to be the end of the line, thinks ASML CTO Martin van den Brink.
ASML is in a state of high alert. Last year, the company raised its production targets twice: it wants to ship some 600 DUV and 90 EUV scanners by 2025, up from just under 200 and 35, respectively, last year. In a typical week, hundreds of people start their new jobs in Veldhoven. Delivery problems are an everyday occurrence due to the ongoing chip shortage. Not to mention setbacks like the fire at the Berlin plant early this year, which temporarily paralyzed the production of EUV wafer clamps.
Still, Martin van den Brink is content and relaxed. For the first time in a good long while, ASML’s chief technical officer doesn’t have a millstone around his neck. Although not yet as productive as customers would like them to be, EUV scanners have already been indispensable in the production processes of the world’s most advanced chips for a couple of years now. Quite a relief, after an endeavor that took a decade longer than planned.
The development of the latest generation of EUV equipment, the high-NA systems, is also progressing well. “I visited the factory floor this afternoon. That machine is a highlight of my career,” says Van den Brink in his office, in which a collection of lithographic artifacts is on display. According to ASML’s roadmap, the due date of the world’s first high-NA scanner is sometime next year, and Van den Brink believes that this target will be met, although supply chain issues could still mess up the timing.
As it turns out, Van den Brink even has the technological course for the next ten years more or less mapped out. It will probably be his last strategic contribution to ASML, as the top executive, who has become entwined with the company, is expected to retire in 2024.
In any case, it seems that whatever is on Van den Brink’s plate these days is manageable – business as usual almost, as far as that’s possible for a company that assembles the world’s most complex production machines. The only thing that appears to bother Van den Brink is his office chair. “Look at this crappy thing. It has way too many adjustment options,” he grumbles as he sits down, demonstratively jiggling the armrest.
When Van den Brink talked with his visitor five years ago, he was in an equally good mood. At a time when all hands were still needed on deck to get EUV on track, he had pushed through his plan for high-NA. ASML’s management and supervisory boards backed the required billion-dollar investments and key optics partner Zeiss got on board as well. “They didn’t want to at first,” admits Van den Brink.
“At the time, I suspected that high-NA would be EUV’s last NA. There was a considerable risk that it would arrive too late, that there wouldn’t be enough shrink left to recoup the investments. I felt we couldn’t afford to postpone high-NA development until we were in the clear with EUV.”
“Transition periods in lithography are awful. If you screw up, things go haywire. Especially now that the organization has become so large, I feel tremendous responsibility. I was very paranoid. Do we have a winning proposition? Can we get this done?” Van den Brink eventually became convinced that high-NA was the right way forward and won over the skeptics. But he had overlooked one thing. “In my arrogance, I thought that customers would fall in line, but let me tell you: it sure as hell wasn’t easy.”
Around April 2018, everything fell into place. EUV was gathering steam in high-volume manufacturing and soon after, the first orders for high-NA systems came in. Since then, the preparations for yet another transition period have, on the whole, been pretty smooth. This one is “much easier” than any of the previous lithography transitions, the CTO reveals.
“Why? First, we now have a good understanding of what EUV photons do. Today, we still have issues with the stability of short-wavelength systems and the productivity isn’t up to par. But the main physics issues that we need to understand and clean up – those we’ve largely put behind us.”
Moreover, in any litho transition, ASML needs to rely on innovations from outside. “The resist changes, the mask changes, you get new types of defects. These things all affect the infrastructure. For high-NA, the infrastructure changes are comparatively insignificant. So the risk involved is much lower.”
By far the biggest challenge for developing high-NA technology, says Van den Brink, was constructing the metrology tool for the EUV optics. High-NA mirrors are twice the size of their predecessors and need to be flat within 20 picometers. This needs to be validated in a vacuum vessel so large that “you could house half a company in it.” The vessel is located at Zeiss.
“The problem with building this tool is that you can’t be sure whether it’s accurate enough. You can do all kinds of tests to provide some assurance, but you’re never completely sure. This is the stage we’re at right now. We think it works, but the truth won’t come out until we get the first lens next year.”
If the lens fails to meet the specifications, emergency procedures are in place. “We have backup plans. If it doesn’t work, we have enough degrees of freedom to fix it. We can, within limits, repolish the surface and swap individual mirrors if necessary.” An EUV lens consists of several mirrors – the exact number is a trade secret.
Finally, Van den Brink doesn’t want to underestimate the complexity of a system that’s larger than a typical transit bus. “It’s a monstrosity. Back in the day, a scanner needed a few hundred kilowatts. For EUV, it’s 1.5 megawatts, primarily because of the light source. We use the same light source for high-NA, but we need an additional 0.5 megawatts for the stages. We use water-cooled copper wires to power them. We push a lot of engineering.”
Still, Van den Brink sees no showstoppers, although supply chain issues are fogging up the schedule. “The timing is a bit of a problem. The high-NA machine contains quite a few components that we use in production systems, and today’s meal takes priority over tomorrow’s. It remains a crisis project as far as timing is concerned, but I’m confident that we’ll be very far along by the end of next year.”
The first system will stay in Veldhoven, where ASML and Imec have started a joint high-NA research lab. In 2024, the plan is for customers to get their own machines for R&D purposes. The year after that, the first high-volume manufacturing tools will be delivered.
It would largely spare ASML’s customers the difficult period caused by delays in EUV development. “They’re getting desperate, it’s as simple as that,” Van den Brink said in 2017, referring to announcements from his customers to move EUV into production. The number of chip layers that had to be patterned with two or more 193-nm (immersion) exposure steps was getting so high that semiconductor manufacturers went ahead with EUV scanners despite their then-underwhelming productivity.
Although multi-patterning is already being used in EUV – not out of lithographic necessity, by the way – production-worthy high-NA scanners are expected to arrive before such uncomfortable situations arise. “Customers aren’t desperate. But, to be fair, if high-NA were ready now, they would use it.”
Besides getting the high-NA show on the road, ASML’s current priority is to keep reducing costs for EUV and high-NA patterning. That will take another decade of work, Van den Brink believes. “As long as the performance isn’t yet at the level of 193-nm lithography, there’s a lot of room for improvement. We can still gain a lot in transmission, for example, possibly a factor of two. And we’re not yet squeezing every nanometer of resolution out of the optics. With 193-nm scanners, we’re at the limit thanks to the manipulation of the illumination system. EUV scanners do not yet have the same level of sophistication.”
ASML will also keep focusing on holistic lithography. This suite of metrology and computational techniques allows chipmakers to maintain tight control over their manufacturing processes. This reduces defect rates, which, just like a productivity boost, reduces costs.
What the semiconductor world is dying to know, however, is whether high-NA will get a successor. The possible alternative, ie a new step down in wavelength, isn’t an option, ASML’s Vice President of Technology Jos Benschop already revealed at the SPIE Advanced Lithography conference last year. That has to do with angles: the efficiency with which EUV mirrors reflect light depends strongly on the angle of incidence. A step down in wavelength would change the angular range such that the lenses would simply have to become too large to compensate.
This phenomenon also plays out with an increase in lens aperture (numerical aperture, NA). So is another increase in NA a possibility? ASML is looking into it, Van den Brink confirms. But, personally, he doesn’t believe that hyper-NA will prove viable. “We’re researching it, but that doesn’t mean it will make it into production. For years, I’ve been suspecting that high-NA will be the last NA, and this belief hasn’t changed.”
For ‘standard’ EUV, the NA is 0.33, for high-NA, it’s 0.55 and for hyper-NA, it would be “above 0.7, maybe 0.75. Theoretically, it can be done. Technologically, it can be done. But how much room is left in the market for even larger lenses? Could we even sell those systems? I was paranoid about high-NA and I’m even more paranoid about hyper-NA. If the cost of hyper-NA grows as fast as we’ve seen with high-NA, it will pretty much be economically unfeasible. Although, in itself, that’s also a technological issue. And that’s what we’re looking into.”
The main goal of the hyper-NA research program is therefore to come up with smart solutions that keep the technology manageable in terms of cost and manufacturability. Van den Brink doesn’t want to have to build even larger monsters, he says, gesturing to a miniature version of the metrology vessel in his collection, but also referring to scanner components such as the lenses. “We’re trying to come up with fundamental changes in manufacturing and design to make sure that if we’re going to do it, it will be economically feasible.”
“So that’s a radical departure from our approach to high-NA. We were going to make sure that high-NA would happen. For hyper-NA, we’re accepting that there may be an insurmountable cost constraint, not in the least because transistor shrink is slowing down. Thanks to system integration, it will still be worthwhile to keep developing new chip generations – that’s the good news. But at this point, the question has become very real: which chip structures are too small to manufacture economically?”